Vera Rubin NVL72 Memory Demand: HBM4 and SOCAMM2 Scenarios

Vera Rubin NVL72 creates two different memory requirements: HBM4 attached to Rubin GPUs and LPDDR5X in SOCAMM2 modules on the Vera CPU side. To estimate demand, multiply a stated rack count by the installed configuration—not by an unlabeled headline maximum. The scenarios below are arithmetic exercises, not disclosed NVIDIA orders or supplier shipment forecasts.

Evidence checked October 19, 2026, Korea time. Published platform specifications, dated production statements and hypothetical calculations are labeled separately. No rack hardware, supplier purchase order, wafer requirement or inference benchmark was measured.

1. NVL72 is a configuration name, not a memory-generation guarantee

NVL72 identifies a rack-scale GPU configuration; the full product name matters. NVIDIA’s GB200 page lists Blackwell GPUs with HBM3E, while its Vera Rubin page lists Rubin GPUs with HBM4. A report about “NVL72 shipments” cannot automatically be counted as Rubin HBM4 demand. See the GB200 specification and Vera Rubin specification.

Production also needs a boundary: components being manufactured, completed systems shipping and customer installations becoming usable are different events. NVIDIA’s May 31 release described a production ramp but placed production shipments in the fall. Its later FY2027 Q2 filing says Vera Rubin production shipments began in fiscal Q3. The current product page displays availability. Those statements support a transition into shipments; they do not give us an NVL72 rack-count series.

Sources: May 31 company announcement; 10-Q for the quarter ended July 26, 2026. Fiscal Q3 of FY2027 is not calendar Q3 of 2027. The filing also says Blackwell and Rubin will both ship.

Use: identify the exact architecture before attaching a memory assumption to a shipment headline. Caution: a production announcement is not a bill of materials, an installed-memory average or a purchase commitment for a specific memory supplier.

2. Count two memory paths, not one interchangeable pool

HBM4 is the high-bandwidth memory generation on the GPU side. An HBM stack combines multiple memory dies in a stacked assembly. A stack count is not a die count. SOCAMM2 is a compression-attached module format carrying LPDDR5X on the CPU side; a module is not an HBM stack.

One reference rack · two memory paths
72 Rubin GPUs
GPU count × memory per GPU
HBM4 capacity
Stack count additionally needs capacity per stack.
36 Vera CPUs
CPU count × installed modules per CPU × module capacity
CPU LPDDR5X capacity
SOCAMM2 module count omits the last capacity factor.
Original scope diagram based on NVIDIA’s reference counts. It shows accounting paths, not a physical wiring diagram. CPU and GPU capacities are not interchangeable performance or bandwidth budgets.

The official datasheet, pages 8–10, separates these memory domains. For a broader introduction to the module format and the reported configuration change, our SOCAMM2 and Vera capacity explanation addresses that earlier question. Here we move to rack-level quantity accounting.

Capacity is the amount of stored data, expressed here in nominal GB, TB or PB. Bandwidth is a rate, such as TB/s. More capacity does not alone establish faster inference. Our worksheet normalizes 1 TB = 1,000 GB and 1 PB = 1,000 TB; it does not silently relabel manufacturer GB as GiB.

3. Start with one rack, then expose the missing inputs

A reference specification is a published configuration description, not a measured installed average. The current NVIDIA table lists 288 GB HBM4 per Rubin GPU, 20.7 TB HBM4 per rack, and up to 54 TB CPU LPDDR5X per rack. The CPU ceiling is not our assumption for every shipped system.

GPU-side capacity calculation
72 GPUs × 288 GB = 20,736 GB
20,736 ÷ 1,000 = 20.736 TB per rack

The last number is the decimal-normalized product of the listed inputs; it rounds to the published 20.7 TB. Preserve the reference’s nominal labels rather than treating this as a measurement of exact physical bytes.

A component-density assumption is needed to convert capacity into stack count. Micron’s March 16 release identifies a 36 GB HBM4 12H product and 192 GB SOCAMM2 in high-volume production. “12H” describes stack height, not twelve stacks per GPU. These are useful example densities—not evidence that Micron supplies every stack or module in every rack. Read the dated supplier announcement.

Conditional HBM stack arithmetic
If each stack is 36 GB: 288 ÷ 36 = 8 stacks per GPU.
72 × 8 = 576 stacks per rack.
This is a density-conditioned result, not an independently verified supplier-specific bill of materials.

For the CPU side, let M be populated SOCAMM2 modules per CPU and D be nominal GB per module. Then modules per rack = 36 × M, and CPU capacity per rack = 36 × M × D. We deliberately do not solve M by dividing a rounded CPU maximum by a module label.

Use: calculate capacity and physical component counts in separate columns. Caution: module population rules, exact SKUs and supported densities require a validated configuration. A numerically neat ratio does not supply that validation.

4. What would 100, 500 or 1,000 racks imply?

A scenario is an explicitly chosen input set, not a forecast with an implied probability. We use three invented completed-rack counts to show linear scaling. There is no target quarter, delivery commitment or evidence-based “base case” behind these counts.

Hold the GPU assumption above fixed. For a separate CPU arithmetic exercise, choose M = 4 and D = 192 GB: 768 GB per CPU, 144 modules and 27.648 TB per rack. Four modules per CPU is a worksheet assumption only; this article does not establish that population as an orderable or validated Vera configuration.

Hypothetical capacity · not an order forecast
100 assumed racks
HBM4: 2.0736 PB
CPU LPDDR5X: 2.7648 PB
500 assumed racks
HBM4: 10.368 PB
CPU LPDDR5X: 13.824 PB
1,000 assumed racks
HBM4: 20.736 PB
CPU LPDDR5X: 27.648 PB
Original calculated chart. Every bar starts at zero and uses the same 27.648 PB maximum. Fixed assumptions: 288 GB/GPU; hypothetical four 192 GB CPU modules per CPU. HBM4 and CPU memory remain separate categories even when their capacity bars share a scale.
Invented rack countConditional physical component counts
10057,600 HBM stacks
14,400 SOCAMM2 modules
500288,000 HBM stacks
72,000 SOCAMM2 modules
1,000576,000 HBM stacks
144,000 SOCAMM2 modules

Assumes 36 GB per HBM stack and four CPU modules per CPU, as stated above. Counts exclude spares, other platform types, manufacturing losses and inventory timing. They are not observed orders, die starts or supplier allocations.

One-input sensitivity: at the same 1,000 racks, changing only hypothetical M from 4 to 2 halves the CPU result to 72,000 modules and 13.824 PB. HBM4 stays 20.736 PB. Changing only module density would instead change capacity without changing module count. Neither sensitivity asserts a supported hardware configuration.

For a bit-based planning worksheet, nominal bits = nominal bytes × 8. The 1,000-rack HBM result would be 165.888 petabits under the same decimal convention. That conversion does not tell us how many wafers must be started: packaging, die size, redundancy and yield information are still missing.

5. Why calculated capacity is not supplier revenue

Installed demand is the memory embodied in the systems being counted. Procurement demand is what a buyer orders over a period, which can include inventory and spares. Recognized revenue is another boundary again. The three do not have to peak in the same quarter.

  • Platform mix: a Blackwell shipment is not a Rubin shipment. The fiscal filing supports coexistence, not a one-for-one replacement schedule.
  • Memory mix: capacity per module and modules per CPU can move independently. A richer module mix can change bits per module without the same change in module units.
  • Qualification and share: a supplier’s compatible product establishes business exposure, not its share of all racks. Micron’s announcement is evidence of participation; it is not an allocation table for Micron or competitors.
  • Manufacturing yield: usable stacks are not wafer starts. Without yield and packaging assumptions, multiplying demand into gross production would add false precision.
  • Deployment timing: power, cooling, networking, financing and customer readiness can delay system acceptance or use. Strong component capacity does not remove those gates.

Our interpretation is therefore conditional: a ramp in completed, similarly configured Rubin racks would increase both memory categories, but at different component counts and price/mix sensitivities. A lighter CPU configuration can moderate LPDDR5X capacity per rack while the GPU-side assumption stays unchanged. Conversely, delays or a different product mix can weaken the same demand case. This is industry analysis, not a buy/sell recommendation or a stock-price forecast.

6. Keep the answer in four separate columns

QuantityWhat it does not establish
Memory capacity
GB/TB/PB
Bandwidth, latency or actual orders
Stacks / modules
physical assemblies
Die count, wafer starts or supplier share
Completed racks
units in a period
All Vera platforms or all AI data centers
Supplier revenue
currency in a period
Profit, stock return or bits shipped without more data

Next checks: obtain a dated rack-count source, the installed SKU/population rules, the accounting period and supplier-specific shipment evidence. Until then, keep the model as a sensitivity worksheet rather than a forecast. Our SOCAMM2 specification-reading worksheet explains how to check unit and configuration mismatches before replacing these assumptions.

Appendix. Reproduction boundaries and primary sources

The scenario arithmetic was executed locally with Node.js on Windows. It uses no live shipment database, memory hardware, paid API or model benchmark. All rack counts and the four-module CPU example are invented. Replace them only with compatible, dated inputs; do not use NVIDIA’s maximum CPU memory as an installed average. No supply-share, pricing or yield model is included.

Both figures and the scenario calculations are original educational material. Vendor specifications are dated source inputs, not independently tested performance. Actual rack shipments, populated configurations, purchase quantities and supplier shares remain unavailable in this worksheet.

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