PCIe, NVLink and CXL: Why More Memory Is Not Always More GPU Memory
PCIe, NVLink and CXL are not interchangeable ways to add GPU memory. PCIe commonly carries device I/O; NVLink connects supported processors through product-specific paths; CXL adds memory and cache-coherency protocols over a PCIe-derived physical interface. More addressable capacity does not automatically become local HBM, or deliver HBM-like access time. The useful question is not simply “Which connection is fastest?” It is which processor is accessing which memory, over what route, with what software support? A capacity number without that route can be misleading when planning AI infrastructure. Quick check: before accepting “more AI memory,” label the requesting processor, the memory’s physical location, the link/protocol, and the supported access mechanism. If any field is missing, do not count the capacity as interchangeable GPU HBM. Documentation checked October 24, 2026, KST. This is a source-based architecture explanation with original synthetic arithmetic—not a GPU, PCIe...